\doxysection{stm32h7xx\+\_\+hal\+\_\+exti.\+h}
\hypertarget{stm32h7xx__hal__exti_8h_source}{}\label{stm32h7xx__hal__exti_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_exti.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_exti.h}}
\mbox{\hyperlink{stm32h7xx__hal__exti_8h}{Go to the documentation of this file.}}
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\DoxyCodeLine{00019\ \textcolor{comment}{/*\ Define\ to\ prevent\ recursive\ inclusion\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00020\ \textcolor{preprocessor}{\#ifndef\ STM32H7xx\_HAL\_EXTI\_H}}
\DoxyCodeLine{00021\ \textcolor{preprocessor}{\#define\ STM32H7xx\_HAL\_EXTI\_H}}
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\DoxyCodeLine{00027\ \textcolor{comment}{/*\ Includes\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
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\DoxyCodeLine{00039\ \textcolor{comment}{/*\ Exported\ types\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
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\DoxyCodeLine{00044\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{enum}}
\DoxyCodeLine{00045\ \{}
\DoxyCodeLine{00046\ \ \ HAL\_EXTI\_COMMON\_CB\_ID\ \ \ \ \ \ \ \ \ \ =\ 0x00U,}
\DoxyCodeLine{00047\ \}\ EXTI\_CallbackIDTypeDef;}
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\DoxyCodeLine{00053\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
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\DoxyCodeLine{00084\ \textcolor{comment}{/*\ Exported\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
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\DoxyCodeLine{00092\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_GPIO\ \ \ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG1\ |\ EXTI\_TARGET\_MSK\_ALL\ \ \ \ \ |\ 0x00U)}}
\DoxyCodeLine{00093\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_GPIO\ \ \ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG1\ |\ EXTI\_TARGET\_MSK\_ALL\ \ \ \ \ |\ 0x01U)}}
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\DoxyCodeLine{00152\ \textcolor{preprocessor}{\#if\ defined(LPTIM4)}}
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\DoxyCodeLine{00166\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_57\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x19U)}}
\DoxyCodeLine{00167\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00168\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_57\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_NONE\ \ \ \ |\ 0x19U)}}
\DoxyCodeLine{00169\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*EXTI\_IMR2\_IM57*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00170\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_58\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1AU)}}
\DoxyCodeLine{00171\ \textcolor{preprocessor}{\#if\ defined(EXTI\_IMR2\_IM59)}}
\DoxyCodeLine{00172\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_59\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1BU)}}
\DoxyCodeLine{00173\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00174\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_59\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_NONE\ \ \ \ |\ 0x1BU)}}
\DoxyCodeLine{00175\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*EXTI\_IMR2\_IM59*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00176\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_60\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1CU)}}
\DoxyCodeLine{00177\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_61\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1DU)}}
\DoxyCodeLine{00178\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_62\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1EU)}}
\DoxyCodeLine{00179\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_63\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG2\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1FU)}}
\DoxyCodeLine{00180\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_64\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x00U)}}
\DoxyCodeLine{00181\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_65\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x01U)}}
\DoxyCodeLine{00182\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_66\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x02U)}}
\DoxyCodeLine{00183\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_67\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x03U)}}
\DoxyCodeLine{00184\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_68\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x04U)}}
\DoxyCodeLine{00185\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_69\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x05U)}}
\DoxyCodeLine{00186\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_70\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x06U)}}
\DoxyCodeLine{00187\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_71\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x07U)}}
\DoxyCodeLine{00188\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_72\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x08U)}}
\DoxyCodeLine{00189\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_73\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x09U)}}
\DoxyCodeLine{00190\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_74\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x0AU)}}
\DoxyCodeLine{00191\ \textcolor{preprocessor}{\#if\ defined(ADC3)}}
\DoxyCodeLine{00192\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_75\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x0BU)}}
\DoxyCodeLine{00193\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00194\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_75\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ \ EXTI\_TARGET\_MSK\_NONE\ \ \ |\ 0x0BU)}}
\DoxyCodeLine{00195\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ ADC3\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00196\ \textcolor{preprocessor}{\#if\ defined(SAI4)}}
\DoxyCodeLine{00197\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_76\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x0CU)}}
\DoxyCodeLine{00198\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00199\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_76\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ \ EXTI\_TARGET\_MSK\_NONE\ \ \ |\ 0x0CU)}}
\DoxyCodeLine{00200\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ SAI4\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00201\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}}
\DoxyCodeLine{00202\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_77\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_CPU1|\ 0x0DU)}}
\DoxyCodeLine{00203\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_78\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_CPU2|\ 0x0EU)}}
\DoxyCodeLine{00204\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_79\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_CPU1|\ 0x0FU)}}
\DoxyCodeLine{00205\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_80\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_CPU2|\ 0x10U)}}
\DoxyCodeLine{00206\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00207\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_77\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x0DU)}}
\DoxyCodeLine{00208\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_78\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x0EU)}}
\DoxyCodeLine{00209\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_79\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x0FU)}}
\DoxyCodeLine{00210\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_80\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x10U)}}
\DoxyCodeLine{00211\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00212\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_81\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x11U)}}
\DoxyCodeLine{00213\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}}
\DoxyCodeLine{00214\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_82\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_CONFIG\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_CPU2|\ 0x12U)}}
\DoxyCodeLine{00215\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00216\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_82\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x12U)}}
\DoxyCodeLine{00217\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00218\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_83\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x13U)}}
\DoxyCodeLine{00219\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}}
\DoxyCodeLine{00220\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_84\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_CONFIG\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_CPU1|\ 0x14U)}}
\DoxyCodeLine{00221\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00222\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_84\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x14U)}}
\DoxyCodeLine{00223\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00224\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_85\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_CONFIG\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x15U)}}
\DoxyCodeLine{00225\ \textcolor{preprocessor}{\#if\ defined(ETH)}}
\DoxyCodeLine{00226\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_86\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_CONFIG\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x16U)}}
\DoxyCodeLine{00227\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00228\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_86\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_RESERVED\ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_NONE|\ 0x16U)}}
\DoxyCodeLine{00229\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ ETH\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00230\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_87\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x17U)}}
\DoxyCodeLine{00231\ \textcolor{preprocessor}{\#if\ defined(DTS)}}
\DoxyCodeLine{00232\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_88\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\ |\ 0x18U)}}
\DoxyCodeLine{00233\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DTS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00234\ \textcolor{preprocessor}{\#if\ defined(EXTI\_IMR3\_IM89)}}
\DoxyCodeLine{00235\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_89\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x19U)}}
\DoxyCodeLine{00236\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*EXTI\_IMR3\_IM89*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00237\ \textcolor{preprocessor}{\#if\ defined(EXTI\_IMR3\_IM90)}}
\DoxyCodeLine{00238\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_90\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1AU)}}
\DoxyCodeLine{00239\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*EXTI\_IMR3\_IM90*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00240\ \textcolor{preprocessor}{\#if\ defined(I2C5)}}
\DoxyCodeLine{00241\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_91\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ \ \ |\ EXTI\_EVENT\ |\ EXTI\_REG3\ |\ EXTI\_TARGET\_MSK\_ALL\_CPU\ |\ 0x1BU)}}
\DoxyCodeLine{00242\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*I2C5*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00243\ }
\DoxyCodeLine{00247\ }
\DoxyCodeLine{00251\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_NONE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U}}
\DoxyCodeLine{00252\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_INTERRUPT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000001U}}
\DoxyCodeLine{00253\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_EVENT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000002U}}
\DoxyCodeLine{00254\ \textcolor{preprocessor}{\#if\ defined(DUAL\_CORE)}}
\DoxyCodeLine{00255\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_CORE1\_INTERRUPT\ \ \ \ \ \ \ \ \ \ \ EXTI\_MODE\_INTERRUPT}}
\DoxyCodeLine{00256\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_CORE1\_EVENT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ EXTI\_MODE\_EVENT}}
\DoxyCodeLine{00257\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_CORE2\_INTERRUPT\ \ \ \ \ \ \ \ \ \ \ 0x00000010U}}
\DoxyCodeLine{00258\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_CORE2\_EVENT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000020U}}
\DoxyCodeLine{00259\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00263\ }
\DoxyCodeLine{00267\ \textcolor{preprocessor}{\#define\ EXTI\_TRIGGER\_NONE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U}}
\DoxyCodeLine{00268\ \textcolor{preprocessor}{\#define\ EXTI\_TRIGGER\_RISING\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000001U}}
\DoxyCodeLine{00269\ \textcolor{preprocessor}{\#define\ EXTI\_TRIGGER\_FALLING\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000002U}}
\DoxyCodeLine{00270\ \textcolor{preprocessor}{\#define\ EXTI\_TRIGGER\_RISING\_FALLING\ \ \ \ \ \ \ \ \ (EXTI\_TRIGGER\_RISING\ |\ EXTI\_TRIGGER\_FALLING)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00274\ }
\DoxyCodeLine{00279\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOA\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U}}
\DoxyCodeLine{00280\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOB\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000001U}}
\DoxyCodeLine{00281\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000002U}}
\DoxyCodeLine{00282\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOD\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000003U}}
\DoxyCodeLine{00283\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000004U}}
\DoxyCodeLine{00284\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000005U}}
\DoxyCodeLine{00285\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOG\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000006U}}
\DoxyCodeLine{00286\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOH\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000007U}}
\DoxyCodeLine{00287\ \textcolor{preprocessor}{\#if\ defined(GPIOI)}}
\DoxyCodeLine{00288\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOI\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000008U}}
\DoxyCodeLine{00289\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*GPIOI*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00290\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOJ\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000009U}}
\DoxyCodeLine{00291\ \textcolor{preprocessor}{\#define\ EXTI\_GPIOK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000AU}}
\DoxyCodeLine{00292\ }
\DoxyCodeLine{00296\ }
\DoxyCodeLine{00301\ \textcolor{preprocessor}{\#define\ EXTI\_D3\_PENDCLR\_SRC\_NONE\ \ \ \ \ \ \ 0x00000000U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00302\ \textcolor{preprocessor}{\#define\ EXTI\_D3\_PENDCLR\_SRC\_DMACH6\ \ \ \ \ 0x00000001U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00303\ \textcolor{preprocessor}{\#define\ EXTI\_D3\_PENDCLR\_SRC\_DMACH7\ \ \ \ \ 0x00000002U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00304\ \textcolor{preprocessor}{\#if\ defined\ (LPTIM4)}}
\DoxyCodeLine{00305\ \textcolor{preprocessor}{\#define\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM4\ \ \ \ \ 0x00000003U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00306\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00307\ \textcolor{preprocessor}{\#define\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM2\ \ \ \ \ 0x00000003U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00308\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00309\ \textcolor{preprocessor}{\#if\ defined\ (LPTIM5)}}
\DoxyCodeLine{00310\ \textcolor{preprocessor}{\#define\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM5\ \ \ \ \ 0x00000004U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00311\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00312\ \textcolor{preprocessor}{\#define\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM3\ \ \ \ \ 0x00000004U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00313\ \textcolor{preprocessor}{\#endif}\textcolor{preprocessor}{}}
\DoxyCodeLine{00317\ }
\DoxyCodeLine{00321\ }
\DoxyCodeLine{00322\ \textcolor{comment}{/*\ Exported\ macro\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00326\ }
\DoxyCodeLine{00330\ }
\DoxyCodeLine{00331\ \textcolor{comment}{/*\ Private\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00338\ \textcolor{preprocessor}{\#define\ EXTI\_PROPERTY\_SHIFT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 24U}}
\DoxyCodeLine{00339\ \textcolor{preprocessor}{\#define\ EXTI\_DIRECT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x01UL\ <<\ EXTI\_PROPERTY\_SHIFT)}}
\DoxyCodeLine{00340\ \textcolor{preprocessor}{\#define\ EXTI\_CONFIG\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x02UL\ <<\ EXTI\_PROPERTY\_SHIFT)}}
\DoxyCodeLine{00341\ \textcolor{preprocessor}{\#define\ EXTI\_GPIO\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((0x04UL\ <<\ EXTI\_PROPERTY\_SHIFT)\ |\ EXTI\_CONFIG)}}
\DoxyCodeLine{00342\ \textcolor{preprocessor}{\#define\ EXTI\_RESERVED\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x08UL\ <<\ EXTI\_PROPERTY\_SHIFT)}}
\DoxyCodeLine{00343\ \textcolor{preprocessor}{\#define\ EXTI\_PROPERTY\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_DIRECT\ |\ EXTI\_CONFIG\ |\ EXTI\_GPIO)}}
\DoxyCodeLine{00344\ }
\DoxyCodeLine{00348\ \textcolor{preprocessor}{\#define\ EXTI\_EVENT\_PRESENCE\_SHIFT\ \ \ \ \ \ \ \ \ \ \ 28U}}
\DoxyCodeLine{00349\ \textcolor{preprocessor}{\#define\ EXTI\_EVENT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x01UL\ <<\ EXTI\_EVENT\_PRESENCE\_SHIFT)}}
\DoxyCodeLine{00350\ \textcolor{preprocessor}{\#define\ EXTI\_EVENT\_PRESENCE\_MASK\ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_EVENT)}}
\DoxyCodeLine{00351\ }
\DoxyCodeLine{00355\ \textcolor{preprocessor}{\#define\ EXTI\_REG\_SHIFT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 16U}}
\DoxyCodeLine{00356\ \textcolor{preprocessor}{\#define\ EXTI\_REG1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x00UL\ <<\ EXTI\_REG\_SHIFT)}}
\DoxyCodeLine{00357\ \textcolor{preprocessor}{\#define\ EXTI\_REG2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x01UL\ <<\ EXTI\_REG\_SHIFT)}}
\DoxyCodeLine{00358\ \textcolor{preprocessor}{\#define\ EXTI\_REG3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x02UL\ <<\ EXTI\_REG\_SHIFT)}}
\DoxyCodeLine{00359\ \textcolor{preprocessor}{\#define\ EXTI\_REG\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_REG1\ |\ EXTI\_REG2\ |\ EXTI\_REG3)}}
\DoxyCodeLine{00360\ \textcolor{preprocessor}{\#define\ EXTI\_PIN\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000001FUL}}
\DoxyCodeLine{00361\ }
\DoxyCodeLine{00365\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_SHIFT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 20U}}
\DoxyCodeLine{00366\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MSK\_NONE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x00UL\ <<\ EXTI\_TARGET\_SHIFT)}}
\DoxyCodeLine{00367\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MSK\_D3SRD\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x01UL\ <<\ EXTI\_TARGET\_SHIFT)}}
\DoxyCodeLine{00368\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MSK\_CPU1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x02UL\ <<\ EXTI\_TARGET\_SHIFT)}}
\DoxyCodeLine{00369\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}}
\DoxyCodeLine{00370\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MSK\_CPU2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (0x04UL\ <<\ EXTI\_TARGET\_SHIFT)}}
\DoxyCodeLine{00371\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_TARGET\_MSK\_D3SRD\ |\ EXTI\_TARGET\_MSK\_CPU1\ |\ EXTI\_TARGET\_MSK\_CPU2)}}
\DoxyCodeLine{00372\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MSK\_ALL\_CPU\ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_TARGET\_MSK\_CPU1\ |\ EXTI\_TARGET\_MSK\_CPU2)}}
\DoxyCodeLine{00373\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00374\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_TARGET\_MSK\_D3SRD\ |\ EXTI\_TARGET\_MSK\_CPU1)}}
\DoxyCodeLine{00375\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MSK\_ALL\_CPU\ \ \ \ \ \ \ \ \ \ \ \ \ \ EXTI\_TARGET\_MSK\_CPU1}}
\DoxyCodeLine{00376\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00377\ \textcolor{preprocessor}{\#define\ EXTI\_TARGET\_MSK\_ALL\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ EXTI\_TARGET\_MASK}}
\DoxyCodeLine{00378\ }
\DoxyCodeLine{00382\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}}
\DoxyCodeLine{00383\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_MODE\_CORE1\_EVENT\ |\ EXTI\_MODE\_CORE1\_INTERRUPT\ |\ EXTI\_MODE\_CORE2\_INTERRUPT\ |\ EXTI\_MODE\_CORE2\_EVENT)}}
\DoxyCodeLine{00384\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00385\ \textcolor{preprocessor}{\#define\ EXTI\_MODE\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_MODE\_EVENT\ |\ EXTI\_MODE\_INTERRUPT)}}
\DoxyCodeLine{00386\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DUAL\_CORE\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00387\ }
\DoxyCodeLine{00391\ \textcolor{preprocessor}{\#define\ EXTI\_TRIGGER\_MASK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (EXTI\_TRIGGER\_RISING\ |\ EXTI\_TRIGGER\_FALLING)}}
\DoxyCodeLine{00392\ }
\DoxyCodeLine{00396\ \textcolor{preprocessor}{\#if\ (STM32H7\_DEV\_ID\ ==\ 0x483UL)}}
\DoxyCodeLine{00397\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_NB\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 92UL}}
\DoxyCodeLine{00398\ \textcolor{preprocessor}{\#elif\ (STM32H7\_DEV\_ID\ ==\ 0x480UL)}}
\DoxyCodeLine{00399\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_NB\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 89UL}}
\DoxyCodeLine{00400\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00401\ \textcolor{preprocessor}{\#define\ EXTI\_LINE\_NB\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 88UL}}
\DoxyCodeLine{00402\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ EXTI\_LINE\_91\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00403\ }
\DoxyCodeLine{00407\ }
\DoxyCodeLine{00408\ \textcolor{comment}{/*\ Private\ macros\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00412\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_PROPERTY(\_\_EXTI\_LINE\_\_)\ \ \ \ \ \ ((((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_PROPERTY\_MASK)\ ==\ EXTI\_DIRECT)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00413\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_PROPERTY\_MASK)\ ==\ EXTI\_CONFIG)\ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{00414\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_PROPERTY\_MASK)\ ==\ EXTI\_GPIO))}}
\DoxyCodeLine{00415\ \textcolor{preprocessor}{\#if\ defined\ (DUAL\_CORE)}}
\DoxyCodeLine{00416\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_TARGET(\_\_EXTI\_LINE\_\_)\ \ \ \ \ \ \ \ ((((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_TARGET\_MASK)\ \ \ ==\ EXTI\_TARGET\_MSK\_CPU1)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{00417\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_TARGET\_MASK)\ ==\ EXTI\_TARGET\_MSK\_CPU2)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{00418\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_TARGET\_MASK)\ ==\ EXTI\_TARGET\_MSK\_ALL\_CPU)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00419\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_TARGET\_MASK)\ ==\ EXTI\_TARGET\_MSK\_ALL))}}
\DoxyCodeLine{00420\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00421\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_TARGET(\_\_EXTI\_LINE\_\_)\ \ \ \ \ \ \ \ ((((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_TARGET\_MASK)\ ==\ EXTI\_TARGET\_MSK\_CPU1)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{00422\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_TARGET\_MASK)\ ==\ EXTI\_TARGET\_MSK\_ALL))}}
\DoxyCodeLine{00423\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00424\ }
\DoxyCodeLine{00425\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_LINE(\_\_EXTI\_LINE\_\_)\ \ \ \ \ \ \ \ \ \ ((((\_\_EXTI\_LINE\_\_)\ \&\ \string~(EXTI\_PROPERTY\_MASK\ |\ EXTI\_EVENT\_PRESENCE\_MASK\ |\(\backslash\)}}
\DoxyCodeLine{00426\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ EXTI\_REG\_MASK\ |\ EXTI\_PIN\_MASK\ |\ EXTI\_TARGET\_MASK))\ ==\ 0x00UL)\ \&\&\ \(\backslash\)}}
\DoxyCodeLine{00427\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ IS\_EXTI\_PROPERTY(\_\_EXTI\_LINE\_\_)\ \&\&\ IS\_EXTI\_TARGET(\_\_EXTI\_LINE\_\_)\ \&\&\ \(\backslash\)}}
\DoxyCodeLine{00428\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ (EXTI\_REG\_MASK\ |\ EXTI\_PIN\_MASK))\ \ \ \ \ \ <\ \(\backslash\)}}
\DoxyCodeLine{00429\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((EXTI\_LINE\_NB\ /\ 32UL)\ <<\ EXTI\_REG\_SHIFT)\ |\ (EXTI\_LINE\_NB\ \%\ 32UL))))}}
\DoxyCodeLine{00430\ }
\DoxyCodeLine{00431\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_MODE(\_\_MODE\_\_)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_MODE\_\_)\ \&\ \string~EXTI\_MODE\_MASK)\ ==\ 0x00UL)}}
\DoxyCodeLine{00432\ }
\DoxyCodeLine{00433\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_TRIGGER(\_\_EXTI\_LINE\_\_)\ \ \ \ \ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ \string~EXTI\_TRIGGER\_MASK)\ ==\ 0x00UL)}}
\DoxyCodeLine{00434\ }
\DoxyCodeLine{00435\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_PENDING\_EDGE(\_\_EXTI\_LINE\_\_)\ \ (((\_\_EXTI\_LINE\_\_)\ ==\ EXTI\_TRIGGER\_RISING)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00436\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_EXTI\_LINE\_\_)\ ==\ EXTI\_TRIGGER\_FALLING)||\ \(\backslash\)}}
\DoxyCodeLine{00437\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_EXTI\_LINE\_\_)\ ==\ EXTI\_TRIGGER\_RISING\_FALLING))}}
\DoxyCodeLine{00438\ }
\DoxyCodeLine{00439\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_CONFIG\_LINE(\_\_EXTI\_LINE\_\_)\ \ \ (((\_\_EXTI\_LINE\_\_)\ \&\ EXTI\_CONFIG)\ !=\ 0x00UL)}}
\DoxyCodeLine{00440\ }
\DoxyCodeLine{00441\ \textcolor{preprocessor}{\#if\ defined(GPIOI)}}
\DoxyCodeLine{00442\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_GPIO\_PORT(\_\_PORT\_\_)\ \ \ \ \ (((\_\_PORT\_\_)\ ==\ EXTI\_GPIOA)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00443\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOB)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00444\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOC)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00445\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOD)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00446\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00447\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOF)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00448\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOG)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00449\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOH)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00450\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOI)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00451\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOJ)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00452\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOK))}}
\DoxyCodeLine{00453\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00454\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_GPIO\_PORT(\_\_PORT\_\_)\ \ \ \ \ (((\_\_PORT\_\_)\ ==\ EXTI\_GPIOA)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00455\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOB)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00456\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOC)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00457\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOD)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00458\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00459\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOF)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00460\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOG)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00461\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOH)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00462\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOJ)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00463\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PORT\_\_)\ ==\ EXTI\_GPIOK))}}
\DoxyCodeLine{00464\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*GPIOI*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00465\ }
\DoxyCodeLine{00466\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_GPIO\_PIN(\_\_PIN\_\_)\ \ \ \ \ \ \ ((\_\_PIN\_\_)\ <\ 16UL)}}
\DoxyCodeLine{00467\ \textcolor{preprocessor}{\#if\ defined\ (LPTIM4)\ \&\&\ defined\ (LPTIM5)}}
\DoxyCodeLine{00468\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_D3\_PENDCLR\_SRC(\_\_SRC\_\_)\ (((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_NONE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00469\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_DMACH6)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00470\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_DMACH7)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00471\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM4)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00472\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM5))}}
\DoxyCodeLine{00473\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00474\ \textcolor{preprocessor}{\#define\ IS\_EXTI\_D3\_PENDCLR\_SRC(\_\_SRC\_\_)\ (((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_NONE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00475\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_DMACH6)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00476\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_DMACH7)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00477\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{00478\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SRC\_\_)\ ==\ EXTI\_D3\_PENDCLR\_SRC\_LPTIM3))}}
\DoxyCodeLine{00479\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ LPTIM4\ \&\&\ LPTIM5\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00480\ }
\DoxyCodeLine{00484\ }
\DoxyCodeLine{00485\ }
\DoxyCodeLine{00486\ \textcolor{comment}{/*\ Exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00491\ }
\DoxyCodeLine{00496\ \textcolor{comment}{/*\ Configuration\ functions\ ****************************************************/}}
\DoxyCodeLine{00497\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_EXTI\_SetConfigLine(\mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti,\ \mbox{\hyperlink{struct_e_x_t_i___config_type_def}{EXTI\_ConfigTypeDef}}\ *pExtiConfig);}
\DoxyCodeLine{00498\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_EXTI\_GetConfigLine(\mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti,\ \mbox{\hyperlink{struct_e_x_t_i___config_type_def}{EXTI\_ConfigTypeDef}}\ *pExtiConfig);}
\DoxyCodeLine{00499\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_EXTI\_ClearConfigLine(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti);}
\DoxyCodeLine{00500\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_EXTI\_RegisterCallback(\mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti,\ EXTI\_CallbackIDTypeDef\ CallbackID,\ \textcolor{keywordtype}{void}\ (*pPendingCbfn)(\textcolor{keywordtype}{void}));}
\DoxyCodeLine{00501\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_EXTI\_GetHandle(\mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti,\ uint32\_t\ ExtiLine);}
\DoxyCodeLine{00505\ }
\DoxyCodeLine{00510\ \textcolor{comment}{/*\ IO\ operation\ functions\ *****************************************************/}}
\DoxyCodeLine{00511\ \textcolor{keywordtype}{void}\ \ \ \ \ \ \ \ \ \ \ \ \ \ HAL\_EXTI\_IRQHandler(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti);}
\DoxyCodeLine{00512\ uint32\_t\ \ \ \ \ \ \ \ \ \ HAL\_EXTI\_GetPending(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti,\ uint32\_t\ Edge);}
\DoxyCodeLine{00513\ \textcolor{keywordtype}{void}\ \ \ \ \ \ \ \ \ \ \ \ \ \ HAL\_EXTI\_ClearPending(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti,\ uint32\_t\ Edge);}
\DoxyCodeLine{00514\ \textcolor{keywordtype}{void}\ \ \ \ \ \ \ \ \ \ \ \ \ \ HAL\_EXTI\_GenerateSWI(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_e_x_t_i___handle_type_def}{EXTI\_HandleTypeDef}}\ *hexti);}
\DoxyCodeLine{00515\ }
\DoxyCodeLine{00519\ }
\DoxyCodeLine{00523\ }
\DoxyCodeLine{00527\ }
\DoxyCodeLine{00531\ }
\DoxyCodeLine{00532\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{00533\ \}}
\DoxyCodeLine{00534\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00535\ }
\DoxyCodeLine{00536\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ STM32H7xx\_HAL\_EXTI\_H\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00537\ }

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